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| DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs October 1988 Revised March 2000 DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs General Description The DM74LS47 accepts four lines of BCD (8421) input data, generates their complements internally and decodes the data with seven AND/OR gates having open-collector outputs to drive indicator segments directly. Each segment output is guaranteed to sink 24 mA in the ON (LOW) state and withstand 15V in the OFF (HIGH) state with a maximum leakage current of 250 A. Auxiliary inputs provided blanking, lamp test and cascadable zero-suppression functions. Features s Open-collector outputs s Drive indicator segments directly s Cascadable zero-suppression capability s Lamp test input Ordering Code: Order Number DM74LS47M DM74LS47N Package Number M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Logic Symbol Connection Diagram VCC = Pin 16 GND = Pin 8 Pin Descriptions Pin Names A0-A3 RBI LT BI/RBO a -g BCD Inputs Ripple Blanking Input (Active LOW) Lamp Test Input (Active LOW) Blanking Input (Active LOW) or Ripple Blanking Output (Active LOW) Segment Outputs (Active LOW) (Note 1) Note 1: OC--Open Collector Description (c) 2000 Fairchild Semiconductor Corporation DS009817 www.fairchildsemi.com DM74LS47 Truth Table Decimal or Function 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BI RBI LT LT H H H H H H H H H H H H H H H H X H L RBI H X X X X X X X X X X X X X X X X L X A3 L L L L L L L L H H H H H H H H X L X Inputs A2 L L L L H H H H L L L L H H H H X L X A1 L L H H L L H H L L H H L L H H X L X A0 L H L H L H L H L H L H L H L H X L X BI/RBO H H H H H H H H H H H H H H H H L L H a L H L L H L H L L L H H H L H H H H L b L L L L L H H L L L H H L H H H H H L c L L H L L L L L L L H L H H H H H H L Outputs d L H L L H L L H L H L L H L L H H H L e L H L H H H L H L H L H H H L H H H L f L H H H L L L H L L H H L L L H H H L g H H L L L L L H L L L L L L L H H H L (Note 3) (Note 4) (Note 5) (Note 2) (Note 2) Note Note 2: BI/RBO is wire-AND logic serving as blanking input (BI) and/or ripple-blanking output (RBO). The blanking out (BI) must be open or held at a HIGH level when output functions 0 through 15 are desired, and ripple-blanking input (RBI) must be open or at a HIGH level if blanking or a decimal 0 is not desired. X = input may be HIGH or LOW. Note 3: When a LOW level is applied to the blanking input (forced condition) all segment outputs go to a HIGH level regardless of the state of any other input condition. Note 4: When ripple-blanking input (RBI) and inputs A0, A1, A2 and A3 are LOW level, with the lamp test input at HIGH level, all segment outputs go to a HIGH level and the ripple-blanking output (RBO) goes to a LOW level (response condition). Note 5: When the blanking input/ripple-blanking output (BI/RBO) is OPEN or held at a HIGH level, and a LOW level is applied to lamp test input, all segment outputs go to a LOW level. Functional Description The DM74LS47 decodes the input data in the pattern indicated in the Truth Table and the segment identification illustration. If the input data is decimal zero, a LOW signal applied to the RBI blanks the display and causes a multidigit display. For example, by grounding the RBI of the highest order decoder and connecting its BI/RBO to RBI of the next lowest order decoder, etc., leading zeros will be suppressed. Similarly, by grounding RBI of the lowest order decoder and connecting its BI/RBO to RBI of the next highest order decoder, etc., trailing zeros will be suppressed. Leading and trailing zeros can be suppressed simultaneously by using external gates, i.e.: by driving RBI of a intermediate decoder from an OR gate whose inputs are BI/RBO of the next highest and lowest order decoders. BI/ RBO also serves as an unconditional blanking input. The internal NAND gate that generates the RBO signal has a resistive pull-up, as opposed to a totem pole, and thus BI/ RBO can be forced LOW by external means, using wiredcollector logic. A LOW signal thus applied to BI/RBO turns off all segment outputs. This blanking feature can be used to control display intensity by varying the duty cycle of the blanking signal. A LOW signal applied to LT turns on all segment outputs, provided that BI/RBO is not forced LOW. www.fairchildsemi.com 2 DM74LS47 Logic Diagram Numerical Designations--Resultant Displays 3 www.fairchildsemi.com DM74LS47 Absolute Maximum Ratings(Note 6) Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 7V 0C to +70C -65C to +150C Note 6: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Recommended Operating Conditions Symbol VCC VIH VIL IOH IOH IOL TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current a - g @ 15V = VOH (Note 7) HIGH Level Output Current BI /RBO LOW Level Output Current Free Air Operating Temperature 0 Parameter Min 4.75 2 0.8 -250 -50 24 70 Nom 5 Max 5.25 Units V V V A A mA C Note 7: OFF-State at a-g. Electrical Characteristics Over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH IOFF VOL Parameter Input Clamp Voltage HIGH Level Output Voltage Output HIGH Current Segment Outputs LOW Level Output Voltage Conditions VCC = Min, II = -18 mA VCC = Min, IOH = Max, VIL = Max, BI /RBO VCC = 5.5V, VO = 15V a - g VCC = Min, IOL = Max, VIH = Min, a - g IOL = 3.2 mA, BI /RBO IOL = 12 mA, a -g IOL = 1.6 mA, BI /RBO II IIH IIL IOS ICC Input Current @ Max Input Voltage HIGH Level Input Current LOW Level Input Current Short Circuit Output Current Supply Current Note 8: All typicals are at VCC = 5V, TA = 25C. Note 9: Not more than one output should be shorted at a time, and the duration should not exceed one second. Min Typ (Note 8) Max -1.5 Units V V 2.7 3.4 250 0.35 0.5 0.5 0.25 0.4 0.4 100 20 -0.4 A V VCC = Max, VI = 7V VCC = Max, VI = 10V VCC = Max, VI = 2.7V VCC = Max, VI = 0.4V VCC = Max (Note 9), IOS at BI/RBO VCC = Max -0.3 A A mA mA mA -2.0 13 Switching Characteristics at VCC = +5.0V, TA = +25C RL = 665 Symbol Parameter Conditions Min tPLH tPHL tPLH tPHL Propagation Delay An to a -g Propagation Delay RBI to a -g (Note 10) CL = 15 pF Max 100 100 100 100 ns ns Units Note 10: LT = HIGH, A0-A3 = LOW www.fairchildsemi.com 4 DM74LS47 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 5 www.fairchildsemi.com DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com |
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